Dr Koen Buisman

In this paper research activities developed within the FutureCom project are presented. The project, funded by the European Metrology Programme for Innovation and Research (EMPIR), aims at evaluating and characterizing: (i) active devices, (ii) signal- and power integrity of field programmable gate array (FPGA) circuits, (iii) operational performance of electronic circuits in real-world and harsh environments (e.g. below and above ambient temperatures and at different levels of humidity), (iv) passive inter-modulation (PIM) in communication systems considering different values of temperature and humidity corresponding to the typical operating conditions that we can experience in real-world scenarios. An overview of the FutureCom project is provided here, then the research activities are described.

A general measurement-based design methodology for outphasing transmitter architectures is presented. The emulation technique allows to predict the full real world performance of the outphasing scheme without requiring to fabricate the complete power amplifier (PA). Simply, iterative active load-pull measurements of a single branch PA together with the S-parameters of the output combiner are needed. The method determines the authentic dynamic loading condition of both branch PAs by revealing the internal interactions between the nonlinear active devices. Thereby, the insight into the dynamics of load modulation during the outphasing operation provided by the technique, allows PA designers to optimize circuit performance. The design methodology is demonstrated by emulating an outphasing scheme at 2.14 GHz operated in pure- and mixed-mode.

A single planar inverted F-antenna is proposed employing two input ports to optimally power-combine the output signals of two nonlinear power amplifiers inside the metal-only low-loss antenna structure. High power-added efficiency (PAE) at back-off power levels is reached through a Doherty combiner architecture, where the optimal power combination is seen to generally require the synthesis of a nonsymmetric antenna input impedance matrix. The dual-fed antenna is compact and exhibits close to single-mode radiation properties; it has a relatively stable gain pattern despite the nonequal Doherty power amplifier (PA) output powers. An integrated active prototype has been designed, fabricated, and characterized over-the-air in both an anechoic and a reverberation chamber. Good agreement is observed and an uncertainty analysis is performed. The Doherty transmitter features a max-PAE of 58% at 2.14 GHz and a 6 dB back-off PAE of 52%; a minimum system power gain of 9.5 dB (max 12 dB); and a maximum system output power of 43.5 dBm.

This paper presents a compact W-band heterodyne receiver MMIC realised in a 60 nm GaN-on-Si foundry process. The single-chip receiver consists of an LNA with a measured NF of 4.4-5.5 dB at 90-95 GHz and a resistive down-conversion mixer with a frequency doubler for the multiplication of the LO signal. The measured receiver conversion gain is 0-7.4 dB/0-6.4 dB at 75-91 GHz when the LO/2 power is 20.5 dBm (IF=5 GHz/2 GHz). The measured receiver 1 dB compression point is found to occur at an input power level of -12 dBm and -9 dBm at 80 GHz and 91 GHz, respectively (IF=2GHz). To the best of our knowledge, this single-chip receiver achieves the smallest size (4 mm 2 ), widest RF and IF bandwidths and highest linearity among reported GaN single-chip receivers in this frequency range. The receiver noise figure can be reduced by using an alternative GaN-on-Si LNA design with a measured average NF of 3.6-4.0 dB at 75-95 GHz and a measured maximum input 1 dB compression point of -3 dBm at 95 GHz.

Calibration of mm-wave transceiver arrays with respect to phase and amplitude of signals on all its antenna elements is essential for proper operation. Moreover, during operation it may be necessary to update such calibration coefficients. Here we present an algorithm based on channel symmetries to calibrate both transmitter and receiver amplitude and phase in a mm-wave testbed using Over-The-Air measurements only. The algorithm is tested using the Chalmers mm-wave testbed MATE at 29 GHz.

Conference Title: 2022 16th European Conference on Antennas and Propagation (EuCAP) Conference Start Date: 2022, March 27 Conference End Date: 2022, April 1 Conference Location: Madrid, SpainCalibration and validation of mm-wave transceiver arrays with respect to phase and amplitude of all elements is an essential part of production testing. Also afterwards during operation it may be necessary to update calibration coefficients. Here we present an algorithm based on channel symmetries, derive mathematically its expression, experimentally verify its results with respect to amplitude in a mm-wave testbed and compare the results to an extract model.

In this article, we propose an efficient methodology for the electrothermal characterization of power amplifier (PA) integrated circuits. The proposed electrothermal analysis method predicts the effect of temperature variations on the key performances of PAs, such as gain and linearity, under realistic dynamic operating conditions. A comprehensive technique for identifying an equivalent compact thermal model (CTM), using data from 3-D finite element method thermal simulation and nonlinear curve fitting algorithms, is described. Two efficient methods for electrothermal analysis applying the developed CTM are reported. The validity of the methods is evaluated using commercially available electrothermal computer-aided design (CAD) tools and through extensive pulsed RF signal measurements of a PA device under test. The measurement results confirm the validity of the proposed electrothermal analysis methods. The proposed methods show significantly faster simulation speed compared with available CAD tools for electrothermal analysis. Moreover, the results reveal the importance of electrothermal characterization in the prediction of the temperature-aware PA dynamic operation.

An analytical load-pull-based design methodology for three-stage Doherty power amplifiers (PAs) is presented and demonstrated. A compact output combiner network, together with the input phase delays, is derived directly from transistor load-pull data and the design requirements. The technique opens up a new design space for three-stage Doherty PAs with reconfigurable high-efficiency power back-off levels. The method is designed to enable high transistor power utilization by maintaining full voltage and current swings of the main and auxiliary amplifier cells. Therefore, a wide efficiency enhancement range can be achieved also with symmetrical devices. As a proof of concept, a 2.14-GHz 30-W three-stage Doherty PA with identical gallium nitride (GaN) HEMT active devices is designed, fabricated, and characterized. The prototype PA is able to linearly reproduce 20-MHz long-term evolution signals with 8.5- and 11.5-dB peak-to-average power-ratio (PAPR), providing average efficiencies of 56.6% and 46.8% at an average output power level of 36.8 and 33.8 dBm, respectively. Moreover, an average efficiency as high as 54.5% and an average output power of 36.3 dBm have been measured at an adjacent power leakage ratio of −45.7 dBc for a 100-MHz signal with 8.5 dB of PAPR, after applying digital predistortion linearization.

Hybrid digital and analog beamforming is an emerging technique for high-data-rate communication at millimeter-wave (mm-wave) frequencies. Experimental evaluation of such techniques is challenging, time-consuming, and costly. This article presents a hardware-oriented modeling method for predicting the performance of an mm-wave hybrid beamforming transmitter. The proposed method considers the effect of active circuit nonlinearity as well as the coupling and mismatch in the antenna array. It also provides a comprehensive prediction of radiation patterns and far-field signal distortions. Furthermore, it predicts the antenna input active impedance, considering the effect of active circuit load-dependent characteristics. The method is experimentally verified by a 29-GHz beamforming subarray module comprising an analog beamforming integrated circuit (IC) and a 2 2 subarray microstrip patch antenna. The measurement results present good agreement with the predicted ones for a wide range of beam-steering angles. As a use case of the model, far-field nonlinear distortions for different antenna array configurations are studied. The demonstration shows that the variation of nonlinear distortion versus steering angle depends significantly on the array configuration and beam direction. Moreover, the results illustrate the importance of considering the joint operation of beamforming ICs, antenna array, and linearization in the design of mm-wave beamforming transmitters.

In this paper, we evaluate the nonlinear distortion of the transmitter (Tx) and receiver (Rx), separately, of the developed mm-wave testbed at Chalmers University of Technology, MATE, using Over-The-Air (OTA) measurement. The developed testbed has been designed to operate within 27 - 31 GHz frequency range, with 1 GHz analog bandwidth per Tx or Rx. An overview on the system configuration has been provided. In order to evaluate the limitations of the proposed testbed, we have conducted several experiments on nonlinear distortion effects of the constructed Tx and RF frontends.

This paper presents an experimental evaluation of two co-planar waveguide (CPW) based E/W-band amplifier MMICs realised in a 60 nm GaN-on-Si foundry process. A one-stage amplifier and a two-stage amplifier realised in this process have a measured maximum gain of 8 dB and 16 dB at 73-74 GHz, respectively. The two amplifiers have a measured gain of 3 dB and 7 dB at 93 GHz when the drain voltage (V-d) is 10 V and the drain current (I-d) is 15 mA per stage. The two-stage amplifier has a measured noise figure (NF) of 2.7-3.8 dB and 2.9-4.1 dB at 90-95 GHz when the I-d is 10 mA and Vd is 5 V and 10 V, respectively. The measured NF of this amplifier is equal to 4-6 dB at 92-95 GHz when an Id of 10-20 mA is used in each stage with same drain bias.

A joint design approach for cointegrated antenna and power amplifier (PA), employing a high-efficiency Doherty PA (DPA) architecture and including a bandpass RF filter, is proposed. This design is realized through the optimally distributed and balanced multiport feeding of the cavity-backed patch antenna element that provides the desired (unique) loading conditions for the main and auxiliary PA branches and tailored power combining. A novelty and advantage of this feeding solution is that each pair of feeding points forms a virtual common feeding center of the radiating element; as a result, the radiation pattern remains power invariant when the port excitations change. A joint optimization of the integrated antenna-DPA transmitter is carried out to enhance the overall performance and maximize the bandwidth. This optimization is demonstrated through an example design for the sub-6 GHz telecommunication applications that target high power efficiency (>50%) at the 6 dB backed-off power levels and require RF-filtering in a compact integrated design. The latter challenge leads to a nonconventional implementation, which generally does not require the filter to be inserted between the antenna and the final output stage of the PA, and can be embedded in the topology with complex-valued source/load impedance values. The results of numerical studies are supported by measurements obtained with the antenna-DPA-filter prototype system.

This paper demonstrates different use cases in Over-the-Air (OTA) measurements to differentiate between different sources of distortion, for the purpose of receiver characterization. We propose to use both single-input single-output (SISO), as well as multiple-input single-output (MISO) test cases. To demonstrate the method, we operated the Chalmers mm-wave MIMO testbed, MATE, at 29.4 GHz in a line of sight test configuration. For the MISO case, a beamforming algorithm is used to steer the beams at one RX. The algorithm exhibits measurement results that agree well with theoretical analysis and are sufficiently stable over time. By sweeping the transmit power, in the SISO and MISO cases, the sources of distortion can be clearly differentiated.

This paper presents a multi-physical system-level simulation workflow to characterise the performance of a heterogeneously integrated communications module for mm-wave applications. Basic principles behind modelling different parts and properties of the module are explained. The workflow combines the electromagnetic properties of a patch antenna array operating at 39 GHz with polynomial-based power amplifier (PA) models and thermal simulations of the structural heating. Effects of heating on the PA properties are also considered. The PA model is based on and compared with circuit simulations of a mm-wave transceiver chip, and the results are in good agreement. The proposed workflow can be used to describe and predict the performance of the module in different spatio-temporal use cases, and the approach also scales to larger arrays and more detailed simulation models.

A measurement-based approach for the analysis of Doherty power amplifiers (DPAs) is presented. The DPA behavior is emulated using an active load-pull setup, exciting a single device under test (DUT) in either of two states, corresponding to the main and auxiliary branches in a DPA. The dynamic loading condition in one state is determined from the Doherty combiner parameters and the knowledge of the DUT behavior in the other state. By iterating between these states, the measurements converge to the true behavior of a complete DPA. This method provides measurement-based insights in the dynamic loading conditions and the corresponding individual device performance without having to manufacture the full DPA. The method is demonstrated by emulating and cross-verifying a 2.14-GHz DPA.

A method to emulate differential transmitter architectures is presented. The technique, which is based on mixed-mode active load-pull measurements, predicts power amplifier (PA) performance while avoiding the need to manufacture the complete PA. The method is based on an iterative procedure using transistor/branch PA active load-pull measurements together with the S-parameters of the load network. Advantageously, real world performance of the complete differential PA can be evaluated in the design stage. Thereby, many different output combiners and configurations, e.g., biases, transistors, and branch phases, can be fully evaluated without fabrication. Compared to prior art, the method requires only a single representative device-under-test, while providing flexibility in the input signal and the target load network. Thus, a novel powerful measurement tool for PA designers is presented. The technique is demonstrated by performing mixed-mode load-pull and emulating a differential amplifier at 2.14 GHz using continuous wave signals.

A method to emulate multi-stage power amplifier (PA) architectures is presented. The technique predicts multi-stage PA performance. The method is based on an iterative procedure using transistor/branch PA active load-pull measurements to include inter-stage interaction. As a benefit, real-world performance of a multi-stage PA can be evaluated early in the design process. Compared to previous published work, the method requires only a single representative device-under-test to embody multi-stage architectures. Thus, a compelling measurement method for PA designers is presented. The method is demonstrated by emulating a two-stage differential amplifier at 2.14 GHz using single-tone signals.

An active load-pull measurement technique is exploited to test the performance of novel high-efficiency power amplifier (PA) concepts based on non-reciprocity. This technique allows new PA architectures, including its load-modulation, to be evaluated before any construction is necessary. Merely active load -pull measurements of a single representative device or PA, in combination with knowledge of the S-parameters of the output combiner, are needed. As a result of the technique, the load modulation on the branch PAs are exposed, thereby allowing PA designers to optimize PA performance. The technique is demonstrated by emulating a load-modulation PA, consisting of two branch PAs with their outputs combined using a non-reciprocal circulator. The resulting PA concept is designed and evaluated at 2.14 GHz.

A novel technique to compensate for the nonlinearity of a receiver (RX) is proposed and demonstrated experimentally. The adaptive technique is fully blind and does not require any prior knowledge of the transmitting signal. The technique has the capability to both characterize and compensate for the nonlinearity of the RX, making it suitable for implementations in both communication and instrumentation systems. For the former, two RXs operating simultaneously and an attenuator are required to enable real-time data transmission. For the latter, measurements using a single RX and an attenuator can be done instead. By utilizing the knowledge of the signals received at different input power levels, the proposed technique provides improvements to the RX linearity. The technique is demonstrated experimentally with an RF amplifier, where significant improvements quantified through multiple indicators, e.g., the adjacent channel power ratio, are observed.

A measurement technique to reduce the error of measured frequency-domain reflection and transmission coefficients, in particular, scattering parameters (S-parameters) measured with a vector network analyzer (VNA), and load reflection coefficients measured in wideband active load-pull system, is proposed. The technique models either the incident or reflected wave as the output of a finite impulse response (FIR) filter, and subsequently apply least-squares estimation (LSE) to estimate the reflection or transmission coefficients which minimize the error of said wave. When compared against the existing technique, the proposed technique offers precision improvement to the estimated reflection and transmission coefficients. Faster VNA measurements using up to 15-MHz intermediate frequency (IF) bandwidth are experimentally shown to be significantly improved to give good correspondence with slower measurements using 100-Hz IF bandwidth as reference. Error improvement across the measurement bandwidth of more than 17 dB is experimentally observed. Furthermore, the improvement is applicable to both the frequency regions with higher and lower signal to noise ratios of the reflected waves. On the other hand, applying the proposed technique in a wideband active load-pull system to estimate the load reflection coefficients, results in significant error improvement over the existing technique. The error improvement is also experimentally observed both in the in-band 3-dB bandwidth frequency region of the wideband modulated test signal and the out-of-band intermodulation frequency regions, where error improvement of 36 dB is observed.

A method to emulate load modulated power amplifier (PA) architectures is proposed. Based on an iterative procedure, true load modulation trajectories are found using simulated or measured load-pull data from the transistor/branch PA together with the S-parameters of the combiner. Advantageously, real world performance of the complete load modulated PA can be evaluated in the design stage. Thereby, many different combiners and configurations (e.g. biases, transistor size ratios, branch phase differences) can be fully evaluated without having to manufacture anything. Furthermore, the disclosed method utilizes tabulated load pull date, which speeds up evaluation significantly compared to prior art. Hence, a novel powerful tool for PA designers is provided. The technique is demonstrated and verified by emulating a Doherty amplifier and an outphasing scheme at 3.5 GHz using CW signals.