Sadegh Keshavarzi
About
My research project
Resilient and trustworthy data replication at wire speedThe project will exploit recent advances in networking, processor, and memory hardware, such as trusted execution environments (TEEs), byte-addressable non-volatile memory (NVRAM), and remote direct memory access (RDMA). It will develop novel data replication algorithms using software primitives offered by this hardware and formally verify their correctness.
To ensure a high degree of trustworthiness, the project outcomes will be extensively evaluated both analytically and empirically. The analytical evaluation will seek to develop new formal models to enable rigorous reasoning about correctness, computability, and costs of the proposed solutions, potentially establishing new lower and upper bounds. It will seek to develop frameworks to automate correctness proofs of its core components using tools such as the Isabelle/HOL theorem prover.
The empirical evaluation will explore integrating software prototypes into real-world applications, such as key-value stores, transactional data stores, and stream processing. The resulting prototypes will be evaluated using standard benchmarks, such as YCSB and TPC-C. The empirical evaluation will be conducted on the state-of-the-art RDMA/NVRAM/SGX testbed hosted by the Department of Computer Science, University of Surrey. The project will benefit from inputs and feedback of our industrial partners, such as NVIDIA, Arm, IBM and Stellar, for identifying case studies and validating its assumptions.
Supervisors
The project will exploit recent advances in networking, processor, and memory hardware, such as trusted execution environments (TEEs), byte-addressable non-volatile memory (NVRAM), and remote direct memory access (RDMA). It will develop novel data replication algorithms using software primitives offered by this hardware and formally verify their correctness.
To ensure a high degree of trustworthiness, the project outcomes will be extensively evaluated both analytically and empirically. The analytical evaluation will seek to develop new formal models to enable rigorous reasoning about correctness, computability, and costs of the proposed solutions, potentially establishing new lower and upper bounds. It will seek to develop frameworks to automate correctness proofs of its core components using tools such as the Isabelle/HOL theorem prover.
The empirical evaluation will explore integrating software prototypes into real-world applications, such as key-value stores, transactional data stores, and stream processing. The resulting prototypes will be evaluated using standard benchmarks, such as YCSB and TPC-C. The empirical evaluation will be conducted on the state-of-the-art RDMA/NVRAM/SGX testbed hosted by the Department of Computer Science, University of Surrey. The project will benefit from inputs and feedback of our industrial partners, such as NVIDIA, Arm, IBM and Stellar, for identifying case studies and validating its assumptions.